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DC Field | Value | Language |
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dc.contributor.author | Sandeep, N. | - |
dc.contributor.author | Ali, J.S.M. | - |
dc.contributor.author | Yaragatti, Udaykumar R. | - |
dc.contributor.author | Vijayakumar, K. | - |
dc.date.accessioned | 2020-03-31T08:45:21Z | - |
dc.date.available | 2020-03-31T08:45:21Z | - |
dc.date.issued | 2019 | - |
dc.identifier.citation | IEEE Transactions on Power Electronics, 2019, Vol.34, 8, pp.7147-7150 | en_US |
dc.identifier.uri | https://idr.nitk.ac.in/jspui/handle/123456789/13180 | - |
dc.description.abstract | This letter describes a novel nine-level inverter based on switched capacitors (SCs) with quadruple-boost ability requiring reduced components. The structure of the proposed topology relies on the series/parallel connection of SCs. It consists of 12 switches and two SCs. As opposed to similar SC-based inverters, the proposed topology does not employ a back-end H-bridge and the voltage stress of all the switches does not exceed twice the input dc voltage. A simple logic-gate-based pulsewidth-modulation scheme is developed for gating the switches of the proposed topology. A comprehensive comparison against the state-of-the-art topologies in terms of the required number of components is performed to attest the outperforming merits of the proposed topology. Finally, various experimental results are presented to validate the feasibility and operability of the proposed topology. 1986-2012 IEEE. | en_US |
dc.title | Switched-Capacitor-Based Quadruple-Boost Nine-Level Inverter | en_US |
dc.type | Article | en_US |
Appears in Collections: | 1. Journal Articles |
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