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DC Field | Value | Language |
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dc.contributor.author | Naik B.S. | |
dc.contributor.author | Suresh Y. | |
dc.contributor.author | Venkataramanaiah J. | |
dc.contributor.author | Panda A.K. | |
dc.date.accessioned | 2021-05-05T10:29:51Z | - |
dc.date.available | 2021-05-05T10:29:51Z | - |
dc.date.issued | 2021 | |
dc.identifier.citation | IEEE Transactions on Circuits and Systems II: Express Briefs , Vol. 68 , 1 , p. 316 - 320 | en_US |
dc.identifier.uri | https://doi.org/10.1109/TCSII.2020.2998496 | |
dc.identifier.uri | http://idr.nitk.ac.in/jspui/handle/123456789/16148 | - |
dc.description.abstract | Nowadays, output voltage boosting gain property along with curtailment in the circuit voltage stress, and component count are considered as the essential topological features for the new multilevel inverter (MLI) circuits. Recognizing the above, a hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief. Each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors. Herein, series-parallel and conventional-series techniques are utilized effectively to balance the capacitor voltages. Further, cost and quantitative comparisons are carried among the state-of-art circuits to highlight the supremacy of proposed circuit. Subsequently, the performance of HNIT is verified experimentally with the fundamental switching PWM technique at different load conditions. © 2004-2012 IEEE. | en_US |
dc.title | A Hybrid Nine-Level Inverter Topology with Boosting Capability and Reduced Component Count | en_US |
dc.type | Article | en_US |
Appears in Collections: | 1. Journal Articles |
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