Please use this identifier to cite or link to this item: https://idr.l3.nitk.ac.in/jspui/handle/123456789/7356
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dc.contributor.authorKamath, A.
dc.contributor.authorSaxena, G.
dc.contributor.authorTalawar, B.
dc.date.accessioned2020-03-30T09:58:54Z-
dc.date.available2020-03-30T09:58:54Z-
dc.date.issued2016
dc.identifier.citation2015 International Conference on Computing and Network Communications, CoCoNet 2015, 2016, Vol., , pp.381-388en_US
dc.identifier.urihttp://idr.nitk.ac.in/jspui/handle/123456789/7356-
dc.description.abstractIn recent years, Network on Chips (NoCs) have provided an efficient solution for interconnecting various heterogeneous intellectual properties (IPs) on a System on Chip (SoC) in an efficient, flexible and scalable manner. Virtual channels in the buffers associated with the core helps in introducing the parallelism between the packets as well as in improving the performance of the network. However, allocating a uniform size of the buffer to these channels is not always suitable. The network efficiency can be improved by allocating the buffer variably based on the traffic patterns and the node requirements. In this paper, we use ring topology as an underlying architecture for the NoC. The percentage of packet drops has been used as a parameter for comparing the performance of different architectures. Through the results of the simulations carried out in SystemC, we illustrate the impact of including virtual channels and variable buffers on the network performance. As per our results, we observed that varied buffer allocation led to a better performance and fairness in the network as compared to that of the uniform allocation. � 2015 IEEE.en_US
dc.titleAnalysis of ring topology for NoC architectureen_US
dc.typeBook chapteren_US
Appears in Collections:2. Conference Papers

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