Please use this identifier to cite or link to this item: https://idr.l3.nitk.ac.in/jspui/handle/123456789/7667
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dc.contributor.authorSharma, B.S.
dc.contributor.authorBhat, M.S.
dc.date.accessioned2020-03-30T10:02:37Z-
dc.date.available2020-03-30T10:02:37Z-
dc.date.issued2017
dc.identifier.citation2017 IEEE 8th Annual Ubiquitous Computing, Electronics and Mobile Communication Conference, UEMCON 2017, 2017, Vol.2018-January, , pp.271-277en_US
dc.identifier.urihttp://idr.nitk.ac.in/jspui/handle/123456789/7667-
dc.description.abstractStructures based on Indium Gallium Arsenide (InGaAs) have attracted a lot of attention in Metal Oxide Semiconductor Field Effect Transistor (MOSFET) technology, recently. In this paper, we investigate the performance of a nano scale dual-gate MOSFET using InGaAs, and propose the design of a high performance In0.55Ga0.45As transistor with modified substrate geometry. Impact of changing the mole-fraction 'x' in In1-xGaxAs on the device performance is observed. To achieve best performance, the device geometry, relative mole fraction of In & Ga, the doping concentration of source/drain region and channel stop implant are varied. Simulations are performed to obtain output and transfer characteristics considering a N+ poly gate as well as a metallic (Al) gate for the proposed device. Simulations show excellent subthreshold slope (~ 62mV/dec), DIBL (~ 30 m V/V) and ION/IOFF = 2.23 � 106 values. As an application, an inverter is designed using this device and its DC and Transient responses for resistive and saturated enhancement NMOS load are plotted. � 2017 IEEE.en_US
dc.titleDesign of high performance dual-gate nano-scale In0.55Ga0.45 as transistor with modified substrate geometryen_US
dc.typeBook chapteren_US
Appears in Collections:2. Conference Papers

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