Transition Metal Oxides Based Devices for Nonvolatile Resistive Random Access Memory Applications

Abstract

Resistive-random-access-memory (RRAM) is envisioned as a promising candidate for next- generation memory applications due to its simple structure, non-volatility, and fast switching speed. RRAM – in principle a transistor analogue – is a two-terminal device wherein an active material (in the form of a dielectric thin film of thickness down to few tens of nanometer)) is sandwiched between two conducting electrodes. Sweeping the dc bias voltage between the terminals, the resistance value of such a device can be toggled between two distinct resistance or current levels. Such phenomenon is called resistive switching (RS). In this work, firstly, we have fabricated and tested the RS behavior of non-volatile nature in a number of devices with mainly two architectures: (1) W-tip/CuxO/Pt/Ti/SiO2/Si and (2) Cu-contact-pad/CuxO/Pt/Ti/SiO2/Si. The device type (1) showed coexistence of two bipolar resistive switching modes, commonly known as eight-wise (8w) and counter-eight-wise (c8w), in their current-voltage (I-V) characteristics. We report considerably high ON/OFF ratio of 105 and stable retention time 15 ×103 sec. The formation and annihilation of metallic Cu nanofilaments was argued as the plausible reason behind the observed resistive switching events. The onset of quantized conductance steps in the typical conductance plots (in units of quanta of conductance 2e2/h, where e and h are electronic charge and Planck’s constant, respectively) – a phenomenon usually observed in narrow conductive channel – was exploited to provide an “indirect” proof for formation of metallic Cu-based filaments or channels during switching. On the contrary, in device type (2), we observed only “regular” bipolar switching. The operating voltage was less than 1 V in both the devices – implying its potential low-power applications. We assessed the underlying conduction mechanism in depth and also using a simple model theoretically estimated the lateral size of the tiny conductive nanofilaments formed during the switching events. Copper being a cost-effective and widely available substance, our results indicate that CuxO based cells can be a feasible and useful route for non- volatile resistive memories. Secondly, we have demonstrated uniform, repetitive and stable RS phenomenon on a low- cost two-terminal metal-insulator-metal stack fabricated using a highly redox-active vanadium based polyoxometalate (POM) molecular clusters, [V10O28]6- – belonging to polyoxovanadate (POV) family. The RS was observed to be unipolar and non-volatile in nature, and occurred at a fairly low operating bias voltage (less than 2 volts), making it suitable for low-power operations. We attribute the switching event to the cycling between formation and rupture of tiny conductive nanofilaments formed due to trapping and de-trapping of positively charged ionized oxygen vacancy sites present in the active switching layer of [V10O28]6-. POMs, in their rich abundance, are highly stable early transition metal oxide nanosized clusters, capable of storing as well as releasing a large number of electrons. In addition, they can undergo fast and reversible redox reactions (both in solid and liquid electrolyte media) in “stepwise” manner – a property that makes them a promising candidate for ultra-fast and multi-level non-volatile molecular memory for high-density data storage. Preliminary investigations on our POV based memory cells resulted in device resistance ratio  25, endurance for more than 200 cycles and stable retention time around 2200 sec, in fully open-air condition. Thirdly, we have initiated building an array of RRAM cells on indium-tin-oxide (ITO) coated flexible polyethylene-terephthalate (PET) substrate. The switching layer was taken as sputter deposited CuxO thin film as in the second work described right above. Thermally deposited aluminum dots acted as top contact and ITO as bottom contact. A few preliminary studies on transport properties have been reported in this dissertation. Also, described are the future directions for building robust and stable resistive memory for flexible and wearable electronic circuitry.